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linux-next: Signed-off-by missing for commit in the usb-gadget-fix ...
Stephen Rothwell writes: Hi Felipe,
Hi Felipe,
Commit
Commit
36b0f5cca90c ("usb: gadget: add error handling for skb_realloc_headroom") 36b0f5cca90c ("usb: gadget: add error handling for skb_realloc_headroom") is missing a Signed-off-by from its author. (actually I find it hard ot believe that "linux-usb-owner@vger.kernel.org <linux-usb-owner@vger.kernel.org>" is the author :-) <linux-usb-owner@vger.kernel.org>" is the author :-) [unhandled content-type:application/pgp-signature]
[PATCH v2 1/2] arm64: dts: sdm845: Add rpmh-rsc node
Douglas Anderson writes: (Summary) + reg = <0x179c0000 0x10000>, + <0x179d0000 0x10000>, + <0x179e0000 0x10000>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-config = <ACTIVE_TCS 2>, + <SLEEP_TCS 3>, + <WAKE_TCS 3>, + <CONTROL_TCS 1>;
[PATCH] MAINTAINERS: Add me as an x86 entry code maintainer
Andy Lutomirski writes: (Summary) And update my email address.
And update my email address.
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: "H. 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 9d5eeff51b5f..624c3fd11d04 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15575,6 +15575,13 @@ S: Maintained F: Documentation/x86/ F: arch/x86/ +X86 ENTRY CODE +M: Andy Lutomirski <luto@kernel.org>
[PATCH] MAINTAINERS: Update e-mail address for Ilia Lin
ilia.lin@kernel ... writes: (Summary) From: Ilia Lin <ilia.lin@kernel.org>
From: Ilia Lin <ilia.lin@kernel.org>
Change to the @kernel.org address
Change to the @kernel.org address
Signed-off-by: Ilia Lin <ilia.lin@kernel.org> 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 035973b23b8b..15a836eebe9a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11799,7 +11799,7 @@ F: Documentation/media/v4l-drivers/qcom_camss.rst F: drivers/media/platform/qcom/camss-8x16/ QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096 -M: Ilia Lin <ilia.lin@gmail.com>
[PATCH 1/2] arm64: dts: sdm845: Add rpmh-rsc node
Douglas Anderson writes: (Summary) + reg = <0x179c0000 0x10000>, + <0x179d0000 0x10000>, + <0x179e0000 0x10000>; + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + qcom,tcs-config = <SLEEP_TCS 3>, + <WAKE_TCS 3>, + <ACTIVE_TCS 2>, + <CONTROL_TCS 1>;
[PATCH 0/3] pinctrl: msm interrupt and muxing fixes
Stephen Boyd writes: (Summary) Here's a collection of pinctrl fixes for the qcom driver that make things a little smoother for DT writers while also fixing a problem seen with level triggered interrupts.
a problem seen with level triggered interrupts.
The first patch fixes an issue where we always see one extra level triggered interrupt when the interrupt triggers. Cc: Doug Anderson <dianders@chromium.org>
Cc: Doug Anderson <dianders@chromium.org>
Stephen Boyd (3):
pinctrl: msm: Really mask level interrupts to prevent latching pinctrl: msm: Mux out gpio function with gpio_request() pinctrl: msm: Configure interrupts as input and gpio mode pinctrl: msm: Configure interrupts as input and gpio mode drivers/pinctrl/qcom/pinctrl-msm.c |
[PATCH v5 1/3] bitfield: fix *_encode_bits()
Johannes Berg writes: (Summary) \ }) -extern void __compiletime_warning("value doesn't fit into mask") +extern void __compiletime_error("value doesn't fit into mask") __field_overflow(void); @@ -121,8 +121,8 @@ static __always_inline u64 field_mask(u64 field) #define ____MAKE_OP(type,base,to,from) \ static __always_inline __##type type##_encode_bits(base v, base field) \ { \ - if (__builtin_constant_p(v) && \ } \ static __always_inline __##type type##_replace_bits(__##type old, \ -- 2.14.4
[PATCH v4 1/3] bitfield: fix *_encode_bits()
Johannes Berg writes: (Summary) \ }) -extern void __compiletime_warning("value doesn't fit into mask") +extern void __compiletime_error("value doesn't fit into mask") __field_overflow(void); @@ -121,8 +121,8 @@ static __always_inline u64 field_mask(u64 field) #define ____MAKE_OP(type,base,to,from) \ static __always_inline __##type type##_encode_bits(base v, base field) \ { \ - if (__builtin_constant_p(v) && \ } \ static __always_inline __##type type##_replace_bits(__##type old, \ -- 2.14.4
[PATCH] posix-timers: use ktime_get_raw_ts64() instead of getrawmo ...
Ivid Suvarna writes: (Summary) 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/time/posix-timers.c b/kernel/time/posix-timers.c index e08ce3f27447..2f50ac8c258f 100644 --- a/kernel/time/posix-timers.c +++ b/kernel/time/posix-timers.c @@ -228,7 +228,7 @@ static int posix_ktime_get_ts(clockid_t which_clock, struct timespec64 *tp) */ static int posix_get_monotonic_raw(clockid_t which_clock, struct timespec64 *tp) { - getrawmonotonic64(tp);
[PATCH v3] bitfield: fix *_encode_bits()
Johannes Berg writes: (Summary) \ + } \ + } while (0) + +#define CHECK_ENC_GET_LE(tp, v, field, res) do { \ + { \ + __le##tp _res; \ + } \ + } while (0) + +#define CHECK_ENC_GET_BE(tp, v, field, res) do { \ + { \ + __be##tp _res;
[PATCH v2] cpufreq: intel_pstate: Fix scaling max/min limits with ...
Srinivas Pandruvada writes: (Summary) 27 ++++++++++++++++++++++----- 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index 1de5ec8d5ea3..ece120da3353 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c @@ -294,6 +294,7 @@ struct pstate_funcs { static struct pstate_funcs pstate_funcs __read_mostly; } static inline void intel_pstate_request_control_from_smm(void) {} #endif /* CONFIG_ACPI */ +#define INTEL_PSTATE_HWP_BROADWELL 0x01 + +#define ICPU_HWP(model, hwp_mode) \ + { X86_VENDOR_INTEL, 6, model, X86_FEATURE_HWP, hwp_mode } + static const struct x86_cpu_id hwp_support_ids[] __initconst = { - { X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_HWP }, + ICPU_HWP(INTEL_FAM6_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL), + ICPU_HWP(INTEL_FAM6_BROADWELL_XEON_D, INTEL_PSTATE_HWP_BROADWELL), + ICPU_HWP(X86_MODEL_ANY, 0), {} };

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